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[Other] CLOCK

Description: 文通过ALTERA公司的quartus II软件，用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为：计时功能，24小时制计时显示；通过七段数码管动态显示时间；校时设置功能，可分别设置时、分、秒；跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital clock. The main function of the completion are: time function, 24-hour time display through the Seven-Segment LED dynamic display time school settings function, can be set hours, minutes, seconds the stopwatch to start, stop, and maintain display and removal.
Platform: | Size: 182272 | Author: 张保平 | Hits:

[VHDL-FPGA-Verilog] ff

Description: QUARTUS II平台上的基于VHDL语言的电梯系统控制程序。-QUARTUS II platform based on the VHDL language elevator system control procedures.
Platform: | Size: 259072 | Author: 凌丽 | Hits:

[VHDL-FPGA-Verilog] Execise

Description: altera官方网站上资料的示例代码Quartus II Software Design Series Foundation-altera official website information sample code Quartus II Software Design Series Foundation
Platform: | Size: 18641920 | Author: jiangwen | Hits:

[VHDL-FPGA-Verilog] vga_hex_disp

Description: 该项目可在VGA显示器上显示ＲＡＭ或ＲＯＭ中的十六进制数据，使用ＶｅｒｉｌｏｇＨＤＬ语言编写，在ＱｕａｒｔｕｓＩＩ开发环境下验证。-The Project displays the content of memory cells in the form of hexadecimal numbers. It uses RAM and ROM memory modules available through special functions. This is why before compiling the whole code the user should open mem.v file and change lpm_ram declarations in RAM module and lpm_rom declarations in ROM module into such that are suitable for a particular producer and scheme. There also may appear the necessity of converting .mif files used to memory initialization. The Memory Initialization File is serviced by the Quartus II environment developed by Altera.
Platform: | Size: 18432 | Author: submars | Hits:

[Other] MATLAB_and_FPGA

Description: 附录 光盘说明 本书附赠的光盘包括各章节实例的设计工程与源码，所有工程在下列软件环境下运行通过： ? Windows XP SP2 ? MATLAB ? Altera Quartus II ? synplify8.4 ? modelsim_ae6.1 光盘目录与实例名称的对应关系如下： cht02文件夹中存放的是书中第2章中的例子，读者可以将一些简单例子的代码 拷贝到MATLAB命令窗口进行运行，也可以把一些复杂的例子做成一个单独 的*.m文件然后运行、调试(要将每行前的“>>”删除)。 cht04文件夹存放的是书中第4章的例子代码。每个例子都建立了一个单独的文件夹， 除了存放与例子相关的代码外，还对各个例子建立了Quartus II工程，编制了仿真测试向量，并对例子进行了编译、综合、布局布线和时序仿真。 cht05文件夹中存放的是一个完整的正弦波频率产生的例子，即书中5.4.1节中的代码， 读者可以应用这些代码建立自己的项目，按照书中介绍的方法，获得完整的项目设计经验。 注意事项： 光盘中的源代码为作者编写，并调试通过，有兴趣的读者可以在此基础上进行二次开发，但请不要用作商业用途。 -CD-ROM Appendix Description The book comes with a CD-ROM includes examples of various sections of the design engineering and source code, all works in the following software environment to run through: ? Windows XP SP2 ? MATLAB ? Altera Quartus II ? Synplify8.4 ? Modelsim_ae6.1 CD-ROM directories and examples of correspondence between the names is as follows: cht02 folders stored in the book are Chapter 2 of the examples, readers may be some simple code examples Copy to the MATLAB command window to run, you can put some examples of the complex into a single And the*. m files to run, debug (to each line before the ">>" delete). cht04 folders stored in the book are examples of Chapter 4 code. Examples of each set up a separate folder, In addition to the storage associated with the example code, but also examples of each set up a Quartus II project, the preparation of the simulation test vectors, and examples have been compiled, integrated, p
Platform: | Size: 6961152 | Author: 吕成林 | Hits:

[Other] EPCS

Description: EPCS FPGA Quartus II 编程教程，很好的视频,这个视频教你怎么编程-EPCS FPGA Quartus II
Platform: | Size: 3342336 | Author: sunlichao | Hits:

[SCM] 16bit_display8bitLED

Description: Abstract七段显示器在DE2可当成Verilog的console，做为16进位的输出结果。Introduction使用环境：Quartus II 7.2 SP1 + DE2(Cyclone II EP2C35F627C6)简单的使用switch当成2进位输入，并用8位数的七段显示器显示16进位的结果。-Abstract Seven-Segment Display as Verilog to DE2 at the console, as 16 of the output binary. Introduction to use the environment: Quartus II 7.2 SP1+ DE2 (Cyclone II EP2C35F627C6) the use of a simple switch as a binary input 2, and paragraph 8-digit binary display 16 results.
Platform: | Size: 7168 | Author: 王媛媛 | Hits:

[VHDL-FPGA-Verilog] ADC0809

Description: 用状态机对A/D转换器0809的采样控制电路的实现。工具：Quartus ii 6.0 语言：VHDL-State machine used for A/D converter sampling control circuit 0809 is achieved. Tools: Quartus ii 6.0 Language: VHDL
Platform: | Size: 46080 | Author: 杨晴飞 | Hits:

[Other] DSP_yingyongjishu

Description: 现代DSP技术 是西安电子科技大学的课件！有fft，fir，dspbulder，iir，quartus II 等内容，非常的详细，值得一看的好的ppt啊。我把好的资料贡献给大家看看啊1-Modern DSP technology is the Xi' an University of Electronic Science and Technology Courseware! There fft, fir, dspbulder, iir, quartus II and so on, very detailed, good to see ah ppt. Contribution to the information I give you a good look at ah 1
Platform: | Size: 25252864 | Author: 卢超 | Hits:

[Documents] elecfans.com_quargfjc1105

Description: QUARTUS II的经典教程，可以快速学会QUARTUS II的一些基础应用-Tutorial QUARTUS II classic, can quickly learn to QUARTUS II of the application of some basic
Platform: | Size: 4137984 | Author: 张文祺 | Hits:

[VHDL-FPGA-Verilog] Quartus_fft_ip_core

Description: Quartus中fft ip core的使用(modelsim 仿真FFT ip core 结合QUARTUS II 联合调试)-Fft ip core in Quartus use (modelsim simulation FFT ip core integration QUARTUS II Joint Commissioning)
Platform: | Size: 299008 | Author: 刘晓彬 | Hits:

[Other] QuartusIIstudy

Description: quartus II的入门与提高。进一步深入介绍该软件的使用。-quartus II and raise the entry. Further introduced the use of the software.
Platform: | Size: 3098624 | Author: a_zhuo | Hits:

[VHDL-FPGA-Verilog] clk_vhdl

Description: Quartus II工程压缩文件，是一个典型的基于FPGA的数字钟工程项目，有50MHz分频、计数、译码等模块。采用VHDL语言编写。-Quartus II project files, is a typical FPGA-based digital clock project, there are sub-50MHz frequency, counting, decoding modules. Using VHDL language.
Platform: | Size: 652288 | Author: kg21kg | Hits:

[VHDL-FPGA-Verilog] stopwatch

Description: Quartus II工程压缩文件，是一个典型的基于FPGA的秒表工程项目，有50MHz分频、计数、译码等模块。采用VHDL语言编写。-Quartus II project files, is a typical FPGA-based project of the stopwatch, a 50MHz frequency, counting, decoding modules. Using VHDL language.
Platform: | Size: 464896 | Author: kg21kg | Hits:

[VHDL-FPGA-Verilog] The-Duck

Description: Crack for Quartus II 8.0
Platform: | Size: 764928 | Author: FPGABug | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: 教你在Quartus II中如何实用LPM库，对与FPGA系统设计有很好指导作用-Teach you how to Quartus II in the LPM utility library, with the FPGA system design have a very good guide
Platform: | Size: 352256 | Author: 钟桂东 | Hits:

[ARM-PowerPC-ColdFire-MIPS] DE2_NIOS_HOST_MOUSE_VGA

Description: 在ALTERA的DE2开发板上做的关于HOST_MOUSE的例子，基于Quartus II 和SOPC Builder以及Nios II IDE平台所完成！-ALTERA development in the DE2 board to do on HOST_MOUSE example, based on the Quartus II and SOPC Builder and Nios II IDE platform completed!
Platform: | Size: 1874944 | Author: liguoyin | Hits:

[ARM-PowerPC-ColdFire-MIPS] DE2_SD_Card_Audio

Description: 在ALTERA的DE2板子上做的一个读写SD卡的例子，基于QUARTUS II ,SOPC BUILDER ,Nios II IDE实现的，从SD卡读写东西-The DE2 board in ALTERA do an SD card reader example, based on the QUARTUS II, SOPC BUILDER, Nios II IDE achieved something from the SD card reader
Platform: | Size: 1816576 | Author: liguoyin | Hits:

[Other] Crack_QII90_SP2

Description: Quartus II 9.0 SP2 破解-crack for Quartus II 9.0 SP2
Platform: | Size: 14336 | Author: 胡文静 | Hits:

[VHDL-FPGA-Verilog] Quartus_II_7.0

Description: Quartus II 7.0工程修复大法。修复不能打开的工程。有人在7.2的软件下用本方法也成功修复。 他是修复这个错误： Error: Can t open project -- you do not have permission to write to all the files or create new files in the project s database directory-Quartus II 7.0 Dafa repair works. Restoration projects can not be opened. It was under the 7.2 software has successfully used this method to repair. He was to repair this error: Error: Can' t open project- you do not have permission to write to all the files or create new files in the project' s database directory
Platform: | Size: 543744 | Author: gan | Hits:
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